IC ADC
| Part Number | LTC2183CUP |
| Date Code | 2117 |
| Quantity Available | 27772 pcs |
| Manufacturer | Linear Technology/Analog Devices |
| Lead Time | Ship within 24 hours |
| QTY | 2500 |
| Datasheet | LTC2183.pdf |
| Minimum Quantity | More than 50pcs |
| Distributor | SingSun |
| RoHS Status | Lead free / RoHS Compliant |
| Ship From | Hong Kong |
| Shipment Way | EMS/SF/DHL/TNT/UPS/FedEx |
| Country of Assembly | MALAYSIA |
| Country of Diffusion | USA |
| Lot Number | PQ28718.45 |
| MSL | 3 |
| Packaging | - |
| Base Product Number | LTC2183 |
| Number of Bits | 16 |
| Sampling Rate (Per Second) | 80M |
| Number of Inputs | 2 |
| Input Type | Differential |
| Data Interface | Parallel |
| Configuration | S/H-ADC |
| Ratio - S/H:ADC | 0.042361111111111 |
| Number of A/D Converters | 2 |
| Architecture | Pipelined |
| Reference Type | External, Internal |
| Voltage - Supply, Analog | 1.7 V ~ 1.9 V |
| Voltage - Supply, Digital | 1.7 V ~ 1.9 V |
| Features | Simultaneous Sampling |
| Operating Temperature | 0°C ~ 70°C |
| Package / Case | 64-WFQFN Exposed Pad |
| Supplier Device Package | 64-QFN (9x9) |
The LTC2183 is two-channel simultaneous sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 76.8dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.07psRMS allows undersampling of IF frequencies with excellent noise performance.
DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.4LSBRMS.
The digital outputs can be either full rate CMOS, Double Data Rate CMOS, or Double Data Rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.
The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.
