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LTC4315IDE#TRPBF

LTC4315IDE#TRPBF

IC ACCELERATOR I2C HOTSWAP 12DFN

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Shenzhen
7545 pcs
Shanghai
719 pcs
Hong Kong
4126 pcs
United States
1210 pcs
The above prices and inventory are for reference only, please consult customer service for the latest quotation and inventory!

Specifications of LTC4315IDE#TRPBF

Part Number LTC4315IDE#TRPBF
Date Code 2134
Quantity Available 13600 pcs
Manufacturer Linear Technology/Analog Devices
Lead Time Ship within 24 hours
QTY 2500
Datasheet LTC4315.pdf
Minimum Quantity More than 50pcs
Distributor SingSun
RoHS Status Lead free / RoHS Compliant
Ship From Hong Kong
Shipment Way EMS/SF/DHL/TNT/UPS/FedEx
Country of Assembly KOREA
Country of Diffusion IRELAND
Lot Number CW78468.28
MSL 4
Base Product Number LTC4315
Packaging Tape & Reel (TR)
Type Buffer, Accelerator
Applications I2C - Hotswap
Input 2-Wire Bus
Output 2-Wire Bus
Data Rate (Max) 400kHz
Number of Channels 1
Delay Time -
Signal Conditioning -
Capacitance - Input 10pF
Voltage - Supply 2.9 V ~ 5.5 V
Current - Supply 8.1mA
Operating Temperature -40°C ~ 85°C
Package / Case 12-WFDFN Exposed Pad
Supplier Device Package 12-DFN (4x3)

LTC4315IDE#TRPBF Features

● Bidirectional Buffer Increases Fanout
● High Noise Margin with VIL = 0.3 • VCC
● Compatible with Non-Compliant I2C Devices That Drive a High VOL
● Selectable Rise Time Accelerator Current
● Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses
● Prevents SDA and SCL Corruption During Live Board Insertion and Removal from Backplane
● Stuck Bus Disconnect and Recovery
● Compatible with I2C, I2C Fast Mode and SMBus
● ±4kV Human Body Model ESD Ruggedness
● High Impedance SDA, SCL pins When Unpowered
● 12-Lead (4mm × 3mm) DFN and 12-Lead MSOP Packages

LTC4315IDE#TRPBF Applications

● Capacitance Buffers/Bus Extender
● Live Board Insertion
● Telecommunications Systems Including ATCA
● Level Translation
● PMBus
● Servers

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LTC4315IDE#TRPBF Description

The LTC4315IDE#TRPBF is a hot-swappable 2-wire bus buffer that provides bidirectional buffering, while maintaining a low offset voltage and high noise margin up to 0.3 • VCC. The high noise margin allows the LTC4315 to be interoperable with devices that drive a high VOL (>0.4V) and allows multiple LTC4315s to be cascaded. The LTC4315 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses.

During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Connection is established between the input and output after ENABLE is asserted high and a stop bit or bus idle condition has been detected on the SDA and SCL pins.

If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, a FAULT signal is generated indicating a stuck bus low condition and the input is disconnected from the output. Up to 16 clock pulses are subsequently generated to free the stuck bus. A three state ACC pin enables input and output side rise time accelerators of various strengths.

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