IC DAC 12BIT R-R I2C 12-DFN
| Part Number | LTC2627CDE-1#TRPBF |
| Date Code | 2329 |
| Quantity Available | 15899 pcs |
| Manufacturer | Linear Technology/Analog Devices |
| Lead Time | Ship within 24 hours |
| QTY | 500 |
| Datasheet | LTC2627.pdf |
| Minimum Quantity | More than 50pcs |
| Distributor | SingSun |
| RoHS Status | Lead free / RoHS Compliant |
| Ship From | Hong Kong |
| Shipment Way | EMS/SF/DHL/TNT/UPS/FedEx |
| Country of Assembly | MALAYSIA |
| Country of Diffusion | UNITED STATES |
| Lot Number | IR11267.53 |
| MSL | 3 |
| Packaging | Tape & Reel (TR) |
| Base Product Number | LTC2627 |
| Series | - |
| Number of Bits | 12 |
| Number of D/A Converters | 2 |
| Settling Time | 7μs (Typ) |
| Output Type | Voltage - Buffered |
| Differential Output | No |
| Data Interface | I2C |
| Reference Type | External |
| Voltage - Supply, Analog | 2.7 V ~ 5.5 V |
| Voltage - Supply, Digital | 2.7 V ~ 5.5 V |
| INL/DNL (LSB) | ±1.5, ±0.5 (Max) |
| Architecture | - |
| Operating Temperature | 0°C ~ 70°C |
| Package / Case | 12-WFDFN Exposed Pad |
| Supplier Device Package | 12-DFN (4x3) |
| Mounting Type | Surface Mount |
The LTC2627CDE are dual 12-bit, 2.7V to 5.5V rail-to-rail voltage output DACs in a 12-lead DFN package. They have built-in high performance output buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for 16- and 14-bit DACs and advance performance standards for output drive and load regulation in single-supply, voltage-output DACs.
The parts use a 2-wire, I2C compatible serial interface. The LTC2627CDE operate in both the standard mode (clock rate of 100kHz) and the fast mode (clock rate of 400kHz). An asynchronous DAC update pin (LDAC) is also included.
The LTC2627CDE incorporate a power-on reset circuit. During power-up, the voltage outputs rise less than 10mV above zero scale; and after power-up, they stay at zero scale until a valid write and update take place. The power-on reset circuit resets the LTC2627CDE-1 to mid-scale. The voltage outputs stay at midscale until a valid write and update takes place.
